1. Field of the Invention
The present invention relates to an integrated circuit component constituted by mounting, on a wiring board having mounted thereon an integrated circuit module, a chip part which adjusts impedance of wiring patterns. The present invention also pertains to a method for mounting the chip part.
2. Description of the Related Art
As this type of integrated circuit component, there is conventionally known, for example, a component having a bypass capacitor as a chip part as shown in FIG. 15 or a component having a damping resistor as a chip part as shown in FIG. 16.
First, an integrated circuit component as shown in FIG. 15 is described. FIG. 15A is a sectional view of an integrated circuit component having a bypass capacitor, FIG. 15B is a sectional view taken along a line D-D of FIG. 15A, and FIG. 15C is a view in the direction of an arrow E of FIG. 15A.
As shown in these figures, an integrated circuit component 101 has a BGA (Ball Grid Array)-type LSI chip 110 (an integrated circuit module). An external terminal of the integrated circuit component 101 is formed by a plurality of solder bumps 111.
The LSI chip 110 is manufactured, for example, through a process as shown in FIG. 17. More specifically, the LSI chip 110 is manufactured by the following process. First, a BGA package substrate 113 having formed thereon land sections 112 constituting the external terminal is prepared (FIG. 17A). Further, flux 114 is coated on each of the land sections 112 (FIG. 17B). A solder ball 111′ with a predetermined size is placed on the flux 114 (FIG. 17C). Further, the solder ball 111′ is melted to allow the flux 114 to be volatilized. Thus, the LSI chip 110 having mounted thereon solder bumps 111 is obtained (FIG. 17D).
Turning now to FIG. 15, the integrated circuit component 101 is constituted by mounting a bypass capacitor 130 on a wiring board 120 having mounted thereon the LSI chip 110 by solder bonding. In order to prevent or suppress switching noise of the LSI chip 110, the bypass capacitor 130 is mounted near an outside of the LSI chip 110 in an LSI chip 110 mounting surface side of the wiring board 120, or is mounted on a wiring pattern 121 formed on an opposite surface side of the LSI chip 110 mounting surface. Further, the capacitor 130 adjusts inductance and impedance of the wiring pattern 121.
More specifically, accompanying fast switching of the LSI, power feed through the wiring patterns must also be performed at high speed. However, since response speed of the power itself cannot follow current fluctuation of the LSI and the response speed is delayed due to inductance components in a feeder line of the power, switching noise is generated. In order to prevent generation of the switching noise, the bypass capacitor 130 is placed near the LSI chip 110 as shown in the same figure to compensate for response delay of the power. Further, the inductance components of the wiring pattern 121 as a power supply line are reduced.
Next, an integrated circuit component as shown in FIG. 16 is described. FIG. 16A is a sectional view of an integrated circuit component having a damping resistor, FIG. 16B is a sectional view taken along a line F-F of FIG. 16A, and FIG. 16C is a view in the direction of an arrow G of FIG. 16A. In the figure, the same elements as those of FIG. 15 are indicated by the same reference numerals as in FIG. 15 and the description is omitted.
As shown in these figures, an integrated circuit component 102 is constituted by mounting a damping resistor 150 on a wiring board 140 having mounted thereon an LSI chip 110. In order to reduce switching noise or electromagnetic noise in transmission signals transmitted to and from the LSI chip 110, or to suppress reflection, overshoot or undershoot of transmission signals, the damping resistor 150 adjusts impedance of the wiring pattern 141 to realize the impedance matching.
A mounting position of the damping resistor 150 is preferably near an output terminal or input terminal (near a solder bump 111) of the transmission signals between the LSI chip 110 and the wiring board 140 in terms of performance of the impedance matching. Along with a recent tendency to increase capacity (speeding up) of the transmission signals, a rise time and fall time of the signal waveform is extremely reduced. As a result, the wiring pattern 141 which connects between the damping resistor 150 and the output terminal or the input terminal may be required to have a length of about several millimeters.
However, the length of the wiring pattern in the above-described constitution is as follows. As shown in each of FIGS. 15 and 16, each of the lengths L1 and L2 (including each length of vias 122 and 142 which connect between the wiring patterns) of the wiring patterns 121 and 141 equivalent to the sum of leaders of both electrodes in each chip part is about from 6 mm at the minimum to several dozen mm at the maximum. Each of the lengths L3 and L4 of the wiring patterns 121 and 141 in the connecting side with the LSI chip 110 is about 3 mm at the minimum. Practically, in the LSI chip 110, pins (solder bumps) as a connecting object with the chip part are scarcely positioned on the outermost periphery of the LSI chip 110 and are almost always positioned on the inner side of the LSI chip 110. Therefore, the real leader length of the wiring pattern from the LSI chip 110 is about 10 to 20 mm. Accordingly, each of the lengths L1 and L2 of the wiring patterns 121 and 141 equivalent to the sum of the leaders in both the electrodes becomes as long as about 10 to 25 mm. As a result, there is a problem that the above-described switching noise is easily generated due to the lengths of the wiring patterns 121 and 141.
To solve the above-described problem, there is proposed, for example, a capacitor mounting structure of mounting a bypass capacitor between a BGA-type integrated circuit device (an LSI chip) and a wiring board (see, e.g., Japanese Unexamined Patent Publication No. 2001-102512 (FIG. 1)).
FIG. 18A is a sectional view showing an outline of this capacitor mounting structure, and FIG. 18B is a sectional view taken along a line H-H of FIG. 18A. As shown in these figures, in a capacitor mounting structure 103, a bypass capacitor 173 is mounted so as to bridge predetermined adjacent solder pastes 172 among a plurality of solder bumps aligned on a mounting surface of an LSI chip 171. The LSI chip 171 is mounted on the wiring board 175 through other solder balls 174.
By thus mounting the bypass capacitor 173 between the LSI chip 171 and the wiring board 175, the bypass capacitor 173 is disposed near an integrated circuit, and as a result, the switching noise can be suppressed to some extent.
However, the technology described in Japanese Unexamined Patent Publication No. 2001-102512 (FIG. 1) has the following problems.
A first problem is as follows. That is, since a special process is required for the above-described mounting of the bypass capacitor 173 on the LSI chip 171 side, a manufacturing cost is increased. FIG. 19 shows an assumed manufacturing process of the LSI chip 171.
Specifically, the LSI chip 171 is manufactured by the following process. First, a BGA package substrate 183 having formed thereon land sections 182 constituting the external terminal is prepared (FIG. 19A). Further, in each of the land sections 182, special solder pastes 172′ are printed on a place where the bypass capacitor 173 is mounted and predetermined solder pastes 184 are printed on the other places (FIG. 19B). Further, the bypass capacitor 173 is placed on the solder pastes 172′ (FIG. 19C). Subsequently, a solder ball 174 is placed on the other solder pastes 184 (FIG. 19D). Further, these solder pastes are melted and reflowed. Thus, the LSI chip 171 having mounted thereon the bypass capacitor 173 and the solder balls 174 is obtained (FIG. 19E).
In the above-described manufacturing process, a necessary amount of solder paste is different between in a mounting place of the bypass capacitor 173 and in a mounting place of the solder ball 174. Therefore, a special stencil for printing is required. Further, no solder ball 174 is mounted on a mounting place of the bypass capacitor 173 irrespective of individual mounting or collective mounting. Therefore, a special tool is required. Thus, the manufacturing process has a technical/cost problem.
A second problem is as follows. That is, a scope of design is limited by designers and manufacturers.
More specifically, the designers and manufacturers which design an integrated circuit component containing a BGA-type integrated circuit module generally contracts out the integrated circuit module to a BGA mounting maker which specializes in BGA. Accordingly, a mounting position, number and characteristics of a bypass capacitor or a damping resistor must be previously determined at the time of order placement and therefore, are difficult to be changed later. Particularly in the damping resistor, a problem may occur in a characteristic assessment after the manufacture of the first lot due to shortage of characteristic investigation in designing of a wiring board or due to variation in characteristics of LSI. Therefore, a change of constants which specifies the characteristics may be required. However, in the case of mounting the damping resistor on the integrated circuit module side, coordination with the BGA mounting maker is necessary in changing the constants. As a result, any action may not be easily taken due to problems such as a period or cost.
A third problem is as follows. That is, when mounting the bypass capacitor between the LSI chip and the wiring board, the feeder line remains long. FIG. 20A is an enlarged sectional view showing an essential part of the capacitor mounting structure 103 which indicates this problem. FIG. 20B is a sectional view taken along a line I-I of FIG. 20A.
As shown in FIG. 20A, power transmitted through a power supply line 191 which constitutes wiring patterns of the wiring board 175 is transmitted to the bypass capacitor 173 through a via 192, a pad 193 and a solder paste 172. Further, the power reaches a ground line 196 through a solder paste 172, a pad 194 and a via 195. In short, the power is transmitted in a mode of once making a long detour toward the LSI chip 171 side. Therefore, the response speed of the power is delayed due to inductance components in the transmission path of the power, and as a result, an effect of reducing switching noise cannot be greatly obtained.